Struct pci_types::StatusRegister
source · pub struct StatusRegister(/* private fields */);
Implementations§
source§impl StatusRegister
impl StatusRegister
pub fn new(value: u16) -> Self
sourcepub fn parity_error_detected(&self) -> bool
pub fn parity_error_detected(&self) -> bool
Will be true
whenever the device detects a parity error, even if parity error handling is disabled.
sourcepub fn signalled_system_error(&self) -> bool
pub fn signalled_system_error(&self) -> bool
Will be true
whenever the device asserts SERR#.
sourcepub fn received_master_abort(&self) -> bool
pub fn received_master_abort(&self) -> bool
Will return true
, by a master device, whenever its transaction
(except for Special Cycle transactions) is terminated with Master-Abort.
sourcepub fn received_target_abort(&self) -> bool
pub fn received_target_abort(&self) -> bool
Will return true
, by a master device, whenever its transaction is terminated with Target-Abort.
sourcepub fn signalled_target_abort(&self) -> bool
pub fn signalled_target_abort(&self) -> bool
Will return true
whenever a target device terminates a transaction with Target-Abort.
sourcepub fn devsel_timing(&self) -> Result<DevselTiming, ()>
pub fn devsel_timing(&self) -> Result<DevselTiming, ()>
The slowest time that a device will assert DEVSEL# for any bus command except Configuration Space read and writes.
For PCIe always set to Fast
sourcepub fn master_data_parity_error(&self) -> bool
pub fn master_data_parity_error(&self) -> bool
This returns true
only when the following conditions are met:
- The bus agent asserted PERR# on a read or observed an assertion of PERR# on a write
- the agent setting the bit acted as the bus master for the operation in which the error occurred
- bit 6 of the Command register (Parity Error Response bit) is set to 1.
sourcepub fn fast_back_to_back_capable(&self) -> bool
pub fn fast_back_to_back_capable(&self) -> bool
If returns true
the device can accept fast back-to-back transactions that are not from
the same agent; otherwise, transactions can only be accepted from the same agent.
For PCIe always set to false
sourcepub fn capable_66mhz(&self) -> bool
pub fn capable_66mhz(&self) -> bool
If returns true
the device is capable of running at 66 MHz; otherwise, the device runs at 33 MHz.
For PCIe always set to false
sourcepub fn has_capability_list(&self) -> bool
pub fn has_capability_list(&self) -> bool
If returns true
the device implements the pointer for a New Capabilities Linked list;
otherwise, the linked list is not available.
For PCIe always set to true
sourcepub fn interrupt_status(&self) -> bool
pub fn interrupt_status(&self) -> bool
Represents the state of the device’s INTx# signal. If returns true
and bit 10 of the
Command register (Interrupt Disable bit) is set to 0 the signal will be asserted;
otherwise, the signal will be ignored.
Trait Implementations§
source§impl Clone for StatusRegister
impl Clone for StatusRegister
source§fn clone(&self) -> StatusRegister
fn clone(&self) -> StatusRegister
1.0.0 · source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source
. Read moresource§impl Debug for StatusRegister
impl Debug for StatusRegister
source§impl PartialEq for StatusRegister
impl PartialEq for StatusRegister
source§fn eq(&self, other: &StatusRegister) -> bool
fn eq(&self, other: &StatusRegister) -> bool
self
and other
values to be equal, and is used
by ==
.